The formation and patterning of conductive metallization layers define interconnections between various circuit elements in semiconductor fabrication. However, device circuits require fine line conductors for interconnections. Copper-polyimide systems have emerged as a versatile packaging approach for high-density interconnection requirements. This approach provides an interconnect module with a wiring density in excess of 400 lines per centimeter by fabricating copper conductor lines that are several microns wide using polyimide as a dielectric.
The conventional copper-polyimide systems fabrication process consists of depositing a thick film of copper on a substrate and patterning the film by standard lithographic techniques to form conductor lines that are a few microns wide. A polyimide layer is then spin coated onto the substrate. To provide good planarity, multiple coatings of the polyimide film are needed. Additional layers of copper-polyimide interconnect structures can be fabricated over the planarized first layer. Due to the high wiring density offered in such an interconnect structure, usually only two layers of the copper conductor lines are required to produce a functional circuit.
One drawback of the conventional process for making a copper-polyimide structure is that the high aspect ratio geometry of the conductor lines makes planarization of the overall structure very difficult. Usually, multiple coatings of the dielectric polyimide layers are required before an acceptable degree of planarization is achieved. To circumvent this limitation, an alternative fabrication technique consists of depositing and patterning a seed layer for the electroplating of copper, followed by spin coating with photosensitive polyimide. The resulting polyimide film is patterned, exposing the electroplating seed layer lying between the polyimide patterns. Copper conductor lines are then electroplated between the polyimide patterned steps, onto the seed layer. To provide a planar copper-polyimide structure, the thickness of the plated copper conductor is carefully controlled. The critical limitation of this approach is the need for photolithographic patterning of the plating seed layer and proper alignment of the patterned polyimide structure with respect to the electroplating seed layer.